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  ? semiconductor components industries, llc, 2013 may, 2013 ? rev. 0 1 publication order number: NCP45560/d NCP45560 ecoswitch  advanced load management controlled load switch with low r on the NCP45560 load switch provides a component and area-reducing solution for efficient power domain switching with inrush current limit via soft ? start. in addition to integrated control functionality with ultra low on ? resistance, this device offers system safeguards and monitoring via fault protection and power good signaling. this cost effective solution is ideal for power management and hot-swap applications requiring low power consumption in a small footprint. features ? advanced controller with charge pump ? integrated n-channel mosfet with ultra low r on ? input voltage range 0.5 v to 13.5 v ? soft-start via controlled slew rate ? adjustable slew rate control ? power good signal ? thermal shutdown ? undervoltage lockout ? short-circuit protection ? extremely low standby current ? load bleed (quick discharge) ? this is a pb ? free device typical applications ? portable electronics and systems ? notebook and tablet computers ? telecom, networking, medical, and industrial equipment ? set ? top boxes, servers, and gateways ? hot ? swap devices and peripheral ports figure 1. block diagram en bandgap & biases charge pump delay and slew rate control gnd bleed thermal, undervoltage & short ? circuit protection sr control logic pg v out v in v cc dfn12, 3x3 case 506cd marking diagram http://onsemi.com r on typ v cc i max 2.4 m  3.3 v 24 a 3.3 v 2.6 m  v in 1.8 v 5.0 v pin configuration (top view) see detailed ordering and shipping information on page 7 of this data sheet. ordering information (note: microdot may be in either location) 3.2 m  3.3 v 12 v 1 en gnd 4 2 3 12 11 10 9 13: v in v out v out v cc v in ncp45 560 ? x alyw   sr 5 8 pg bleed 6 7 v out v out 1 v out x = h for NCP45560 ? h = l for NCP45560 ? l a = assembly location l = wafer lot y = year w = work week  = pb ? free package
NCP45560 http://onsemi.com 2 table 1. pin description pin name function 1, 13 v in drain of mosfet (0.5 v ? 13.5 v), pin 1 must be connected to pin 13 2 en NCP45560 ? h ? active ? high digital input used to turn on the mosfet, pin has an internal pull down resistor to gnd NCP45560 ? l ? active ? low digital input used to turn on the mosfet, pin has an internal pull up resistor to v cc 3 v cc supply voltage to controller (3.0 v ? 5.5 v) 4 gnd controller ground 5 sr slew rate adjustment; float if not used 6 pg active ? high, open ? drain output that indicates when the gate of the mosfet is fully charged, external pull up resistor 1 k  to an external voltage source required; tie to gnd if not used. 7 bleed load bleed connection, must be tied to v out either directly or through a resistor 1 k  8 ? 12 v out source of mosfet connected to load table 2. absolute maximum ratings rating symbol value unit supply voltage range v cc ? 0.3 to 6 v input voltage range v in ? 0.3 to 18 v output voltage range v out ? 0.3 to 18 v en digital input range v en ? 0.3 to (v cc + 0.3) v pg output voltage range (note 1) v pg ? 0.3 to 6 v thermal resistance, junction ? to ? ambient, steady state (note 2) r ja 28.6 c/w thermal resistance, junction ? to ? ambient, steady state (note 3) r ja 49.7 c/w thermal resistance, junction ? to ? case (v in paddle) r jc 1.7 c/w continuous mosfet current @ t a = 25 c (notes 2 and 4) i max 24 a continuous mosfet current @ t a = 25 c (notes 3 and 4) i max 18.3 a total power dissipation @ t a = 25 c (note 2) derate above t a = 25 c p d 3.49 34.9 w mw/ c total power dissipation @ t a = 25 c (note 3) derate above t a = 25 c p d 2.01 20.1 w mw/ c storage temperature range t stg ? 40 to 150 c lead temperature, soldering (10 sec.) t sld 260 c esd capability, human body model (notes 5 and 6) esd hbm 3.0 kv esd capability, machine model (note 5) esd mm 200 v esd capability, charged device model (note 5) esd cdm 1.0 kv latch ? up current immunity (notes 5 and 6) lu 100 ma stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. pg is an open ? drain output that requires an external pull up resistor 1 k  to an external voltage source. 2. surface ? mounted on fr4 board using 1 sq ? in pad, 1 oz cu. 3. surface ? mounted on fr4 board using the minimum recommended pad size, 1 oz cu. 4. ensure that the expected operating mosfet current will not cause the short ? circuit protection to turn the mosfet off undesirably. 5. tested by the following methods @ t a = 25 c: esd human body model tested per jesd22 ? a114 esd machine model tested per jesd22 ? a115 esd charged device model per esd stm5.3.1 latch ? up current tested per jesd78 6. rating is for all pins except for v in and v out which are tied to the internal mosfet?s drain and source. t ypical mosfet esd performance for v in and v out should be expected and these devices should be treated as esd sensitive.
NCP45560 http://onsemi.com 3 table 3. operating ranges rating symbol min max unit supply voltage v cc 3 5.5 v input voltage v in 0.5 13.5 v ground gnd 0 v ambient temperature t a ? 40 85 c junction temperature t j ? 40 125 c table 4. electrical characteristics (t j = 25 c unless otherwise specified) parameter conditions (note 7) symbol min typ max unit mosfet on ? resistance v cc = 3.3 v; v in = 1.8 v r on 2.4 3.3 m  v cc = 3.3 v; v in = 5 v 2.6 3.6 v cc = 3.3 v; v in = 12 v 3.2 5.1 leakage current (note 8) v en = 0 v; v in = 13.5 v i leak 0.1 1.0  a controller supply standby current (note 9) v en = 0 v; v cc = 3 v i stby 0.65 2.0  a v en = 0 v; v cc = 5.5 v 3.2 4.5 supply dynamic current (note 10) v en = v cc = 3 v; v in = 12 v i dyn 280 400  a v en = v cc = 5.5 v; v in = 1.8 v 530 750 bleed resistance v en = 0 v; v cc = 3 v r bleed 86 115 144  v en = 0 v; v cc = 5.5 v 72 97 121 bleed pin leakage current v en = v cc = 3 v, v in = 1.8 v i bleed 6.0 10  a v en = v cc = 3 v, v in = 12 v 60 70 en input high voltage v cc = 3 v ? 5.5 v v ih 2.0 v en input low voltage v cc = 3 v ? 5.5 v v il 0.8 v en input leakage current NCP45560 ? h; v en = 0 v i il 90 500 na NCP45560 ? l; v en = v cc i ih 90 500 en pull down resistance NCP45560 ? h r pd 76 100 124 k  en pull up resistance NCP45560 ? l r pu 76 100 124 k  pg output low voltage (note 11) v cc = 3 v; i sink = 5 ma v ol 0.2 v pg output leakage current (note 12) v cc = 3 v; v term = 3.3 v i oh 5.0 100 na slew rate control constant (note 13) v cc = 3 v k sr 26 33 40  a fault protections thermal shutdown threshold (note 14) v cc = 3 v ? 5.5 v t sdt 145 c thermal shutdown hysteresis (note 14) v cc = 3 v ? 5.5 v t hys 20 c v in undervoltage lockout threshold v cc = 3 v v uvlo 0.25 0.35 0.45 v v in undervoltage lockout hysteresis v cc = 3 v v hys 25 40 60 mv short ? circuit protection threshold v cc = 3 v; v in = 0.5 v v sc 200 265 350 mv v cc = 3 v; v in = 13.5 v 100 285 500 7. v en shown only for NCP45560 ? h, (en active ? high) unless otherwise specified. 8. average current from v in to v out with mosfet turned off. 9. average current from v cc to gnd with mosfet turned off. 10. average current from v cc to gnd after charge up time of mosfet. 11. pg is an open-drain output that is pulled low when the mosfet is disabled. 12. pg is an open-drain output that is not driven when the gate of the mosfet is fully charged, requires an external pull up res istor 1 k  to an external voltage source, v term . 13. see applications information section for details on how to adjust the slew rate. 14. operation above t j = 125 c is not guaranteed.
NCP45560 http://onsemi.com 4 table 5. switching characteristics (t j = 25 c unless otherwise specified) (notes 15 and 16) parameter conditions symbol min typ max unit output slew rate v cc = 3.3 v; v in = 1.8 v sr 12.4 kv/s v cc = 5.0 v; v in = 1.8 v 12.6 v cc = 3.3 v; v in = 12 v 13.7 v cc = 5.0 v; v in = 12 v 14.0 output turn ? on delay v cc = 3.3 v; v in = 1.8 v t on 195  s v cc = 5.0 v; v in = 1.8 v 180 v cc = 3.3 v; v in = 12 v 280 v cc = 5.0 v; v in = 12 v 265 output turn ? off delay v cc = 3.3 v; v in = 1.8 v t off 4.1  s v cc = 5.0 v; v in = 1.8 v 3.5 v cc = 3.3 v; v in = 12 v 1.4 v cc = 5.0 v; v in = 12 v 0.8 power good turn ? on time v cc = 3.3 v; v in = 1.8 v t pg,on 1.71 ms v cc = 5.0 v; v in = 1.8 v 1.08 v cc = 3.3 v; v in = 12 v 2.15 v cc = 5.0 v; v in = 12 v 1.35 power good turn ? off time v cc = 3.3 v; v in = 1.8 v t pg,off 28 ns v cc = 5.0 v; v in = 1.8 v 21 v cc = 3.3 v; v in = 12 v 28 v cc = 5.0 v; v in = 12 v 21 15. see below figure for test circuit and timing diagram. 16. tested with the following conditions: v term = v cc ; r pg = 100 k  ; r l = 10  ; c l = 0.1  f. figure 2. switching characteristics test circuit and timing diagrams en NCP45560 ? h pg gnd bleed off on sr 10% 90%  v  t sr =  v  t 50% 50% 90% 50% 50% v cc v in v out c l r l r pg v term v pg v out v en t on t off t pg,off t pg,on
NCP45560 http://onsemi.com 5 applications information enable control the NCP45560 has two part numbers, NCP45560 ? h and NCP45560 ? l, that only differ in the polarity of the enable control. the NCP45560 ? h device allows for enabling the mosfet in an active ? high configuration. when the v cc supply pin has an adequate voltage applied and the en pin is at a logic high level, the mosfet will be enabled. similarly, when the en pin is at a logic low level, the mosfet will be disabled. an internal pull down resistor to ground on the en pin ensures that the mosfet will be disabled when not being driven. the NCP45560 ? l device allows for enabling the mosfet in an active ? low configuration. when the v cc supply pin has an adequate voltage applied and the en pin is at a logic low level, the mosfet will be enabled. similarly, when the en pin is at a logic high level, the mosfet will be disabled. an internal pull up resistor to v cc on the en pin ensures that the mosfet will be disabled when not being driven. power sequencing the NCP45560 devices will function with any power sequence, but the output turn ? on delay performance may vary from what is specified. to achieve the specified performance, there are two recommended power sequences: 1. v cc v in v en 2. v in v cc v en load bleed (quick discharge) the NCP45560 devices have an internal bleed resistor, r bleed , which is used to bleed the charge off of the load to ground after the mosfet has been disabled. in series with the bleed resistor is a bleed switch that is enabled whenever the mosfet is disabled. the mosfet and the bleed switch are never concurrently active. it is required that the bleed pin be connected to v out either directly (as shown in figure 4) or through an external resistor, r ext (as shown in figure 3). r ext should not exceed 1 k  and can be used to increase the total bleed resistance. care must be taken to ensure that the power dissipated across r bleed is kept at a safe level. r ext can be used to decrease the amount of power dissipated across r bleed . power good the NCP45560 devices have a power good output (pg) that can be used to indicate when the gate of the mosfet is fully charged. the pg pin is an active ? high, open ? drain output that requires an external pull up resistor, r pg , greater than or equal to 1 k  to an external voltage source, v term , compatible with input levels of other devices connected to this pin (as shown in figures 3 and 4). the power good output can be used as the enable signal for other active ? high devices in the system (as shown in figure 5). this allows for guaranteed by design power sequencing and reduces the number of enable signals needed from the system controller. if the power good feature is not used in the application, the pg pin should be tied to gnd. slew rate control the NCP45560 devices are equipped with controlled output slew rate which provides soft start functionality. this limits the inrush current caused by capacitor charging and enables these devices to be used in hot swap applications. the slew rate can be decreased with an external capacitor added between the sr pin and ground (as shown in figures 3 and 4). with an external capacitor present, the slew rate can be determined by the following equation: slew rate  k sr c sr [v  s] (eq. 1) where k sr is the specified slew rate control constant, found in table 4, and c sr is the slew rate control capacitor added between the sr pin and ground. the slew rate of the device will always be the lower of the default slew rate and the adjusted slew rate. therefore, if the c sr is not large enough to decrease the slew rate more than the specified default value, the slew rate of the device will be the default value. the sr pin can be left floating if the slew rate does not need to be decreased. short ? circuit protection the NCP45560 devices are equipped with short ? circuit protection that is used to help protect the part and the system from a sudden high ? current event, such as the output, v out , being shorted to ground. this circuitry is only active when the gate of the mosfet is fully charged. once active, the circuitry monitors the difference in the voltage on the v in pin and the voltage on the bleed pin. in order for the v out voltage to be monitored through the bleed pin, it is required that the bleed pin be connected to v out either directly (as shown in figure 4) or through a resistor, r ext (as shown in figure 3), which should not exceed 1 k  . with the bleed pin connected to v out , the short ? circuit protection is able to monitor the voltage drop across the mosfet. if the voltage drop across the mosfet is greater than or equal to the short ? circuit protection threshold voltage, the mosfet is immediately turned off and the load bleed is activated. the part remains latched in this off state until en is toggled or v cc supply voltage is cycled, at which point the mosfet will be turned on in a controlled fashion with the normal output turn ? on delay and slew rate. the current through the mosfet that will cause a short ? circuit event can be calculated by dividing the short ? circuit protection threshold by the expected on ? resistance of the mosfet.
NCP45560 http://onsemi.com 6 thermal shutdown the thermal shutdown of the NCP45560 devices protects the part from internally or externally generated excessive temperatures. this circuitry is disabled when en is not active to reduce standby current. when an over ? temperature condition is detected, the mosfet is immediately turned off and the load bleed is activated. the part comes out of thermal shutdown when the junction temperature decreases to a safe operating temperature as dictated by the thermal hysteresis. upon exiting a thermal shutdown state, and if en remains active, the mosfet will be turned on in a controlled fashion with the normal output turn ? on delay and slew rate. undervoltage lockout the undervoltage lockout of the NCP45560 devices turns the mosfet off and activates the load bleed when the input voltage, v in , is less than or equal to the undervoltage lockout threshold. this circuitry is disabled when en is not active to reduce standby current. if the v in voltage rises above the undervoltage lockout threshold, and en remains active, the mosfet will be turned on in a controlled fashion with the normal output turn ? on delay and slew rate.  v cc en bandgap & biases charge pump delay and slew rate control gnd bleed v out v in thermal, undervoltage & short ? circuit protection control logic pg load controller 3.0 v ? 5.5 v v term = 3.3 v r pg power supply or battery 0.5 v ? 13.5 v sr c sr r ext figure 3. typical application diagram ? load switch 100 k
NCP45560 http://onsemi.com 7 v cc en bandgap & biases charge pump delay and slew rate control gnd bleed v out v in thermal, undervoltage & short ? circuit protection control logic pg load v term r pg v cc 3.0 v ? 5.5 v en pg gnd v in 0.5 v ? 13.5 v backplane removable card sr c sr figure 4. typical application diagram ? hot swap  pg v term = 3.3 v r pg  pg NCP45560 ? h en r pd  controller pg pg NCP45560 ? h en r pd figure 5. simplified application diagram ? power sequencing with pg output 10 k 100 k 100 k ordering information device en polarity package shipping ? NCP45560imntwg ? h active ? high dfn12 (pb ? free) 3000 / tape & reel NCP45560imntwg ? l active ? low ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NCP45560 http://onsemi.com 8 package dimensions dfn12 3x3, 0.5p case 506cd issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. ??? ??? ??? a d e b c 0.10 pin one 2x indicator 2x top view side view bottom view a l d2 e2 c c 0.10 c 0.05 c 0.05 note 4 a1 seating plane e 12x note 3 b 12x dim min max millimeters a 0.80 1.00 a1 0.00 0.05 b 0.20 0.30 d 3.00 bsc d2 2.60 2.80 e 3.00 bsc e2 1.90 2.10 e 0.50 bsc l 0.20 0.40 l1 ??? 0.15 1 6 12 7 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 12x 0.45 3.30 0.50 pitch 2.10 0.48 2.86 1 dimensions: millimeters 0.32 11x a3 0.20 ref a3 l2 a1 a3 ?? a-b m 0.10 b c m 0.05 c a m 0.10 b c a m 0.10 b c recommended package outline l2 0.10 ref on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 NCP45560/d ecoswitch is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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